COMP – 222 MICROPROCESSOR ARCHITECTURE
COURSE CONTENTS:
1. FUNDAMENTAL CONCEPTS
1.1. ADDRESS, DATA AND CONTROL BUSES.
1.2. FUNDAMENTAL CONTROL BUS.
1.3. TRISTATE DEVICES IN BUS-BASED SYSTEMS.
1.4. DEFINITION OF TERMS.
1.5. MICROCOMPUTER BLOCK DIAGRAM.
1.6. MEMORY DEVICES.
1.7. I/O PORTS.
1.8. BASIC OPERATION OF COMPUTER.
1.9. RULES OF ADDRESSING AND CONTROL SIGNALS.
2. INTRODUCTION TO INTEL 8088/86
2.1. DEFINITION OF TERMS.
2.2. INSTRUCTION DECODER.
2.3. ACCUMULATOR, ALU, CONDITION FLAGS, ADDRESSING REGISTERS AND PROGRAM COUNTER.
2.4. BLOCK DIAGRAM OF INTEL 8088/86 MICROPROCESSOR.
2.5. FUNCTIONAL PIN DEFINITIONS FOR THE 8088/86.
2.6. POWER AND CLOCKING REQUIREMENT OF 8088/86.
2.7. 8088/86 DATA BUS MULTIPLEXING AND DE-MULTIPLEXING.
2.8. PRODUCTION OF CONVENTIONAL CONTROL SIGNALS FROM THE 8088/86 CONTROL SIGNALS.
3. INTRODUCTION TO INTEL SDK-88/86
3.1. MAIN SECTIONS OF SDK-88/86 AND ITS COMPONENTS.
3.2. BLOCK DIAGRAM OF SDK-88/86.
3.3. SDK-88/86 SYSTEM SCHEMATICS.
3.4. SDK-88/86 DC POWER SUPPLY LEVELS.
3.5. CHARACTERISTICS OF SDK-88/86 CLOCK AND BASIC CONTROL BUS SIGNALS.
3.6. FUNCTIONS AND ADVANTAGES OF INTEL 8088/86 SUPPORT DEICES.
4. INTRODUCTION TO ASSEMBLY PROGRAMMING
4.1. DEFINITION OF TERMS.
4.2. DESIGN OF ALGORITHMS.
4.3. REPRESENTATION OF DATA, ADDRESSES AND PRINTABLE CHARACTERS.
4.4. PROCESS OF HAND ASSEMBLY.
4.5. ADDRESSES AND DATA IN ASSEMBLY LANGUAGES PROGRAMMING.
5. PROGRAMMING TO INTEL
5.1. 8088/86 PROGRAMMING MODEL.
5.2. INSTRUCTION GROUPS IN THE 8088/86 INSTRUCTION SET.
5.3. DATA TRANSFER GROUP.
5.4. ARITHMETIC GROUP AND LOGICAL GROUP.
5.5. BRANCH GROUP.
5.6. STACK AND MACHINE CONTROL.
5.7. ADDRESSING MODES OF THE 8088/86.
5.8. MAIN FEATURES OF SDK-88/86 KEYBOARD MONITOR.
5.9. SUBROUTINES.
5.10. BASIC OPERATION OF 8088/86 STACK AND STACK POINTER.
6. INTEL 8088/86 SYSTEM TIMING AND BUS MULTIPLEXING
6.1. DEFINITION OF TERMS.
6.2. 8088/86 MACHINE CYCLES.
6.3. MEMORY READ AND MEMORY WRITE.
6.4. I/O READ AND I/O WRITE.
6.5. INTRERRUPT ACKNOWLAGE AND BUS IDLE.
6.6. PRODUCTION OF REQUIRED INSTRUCTION CYCLE.
6.7. TIMING DIAGRAM FOR COMMON 8088/86 INSTRUCTIONS.
6.8. PURPOSE AND IMPLEMENTATION OF THE 8088/86 WAIT, HALT AND HOLD STATES.
6.9. INTERPRETATION OF 8088/86 STATE TRANSITION DIAGRAM.
6.10. TIMING OF THE 8088/86 MULTIPLEXED BUS STRUCTURE.
7. SDK-88/86 SYSTEM HARDWARE
7.1. BLOCK DIAGRAM OF SDK-88/86 MAIN BOARD.
7.2. OPERATION OF SDK-88/86 MAIN BOARD SUB-SYSTEMS.
7.3. BLOCKDIAGRAM OF THE SDK-88/86 EXPANSION BOARD.
7.4. OPERATION OF EXPANSION BOARD SUB-SYSTEMS.
7.5. USE OF INTEL, 8088/86 SUPPORT DEVICES TO BUILD A MINIMUN SYSTEM.
7.6. SDK-88/86 MEMORY AND I/O MAPS.
7.7. USE OF THE EXPANSION BOARD ADDRESS SELECT JUMPERS.
8. INTERFACING TO INTEL 8088/86
8.1. ISOLATED I/O AND MEMOR MAPPED I/O.
8.2. ABSOLUTE ADDRESS AND LINEAR ADDRESS DECORDING.
8.3. UNCONDITIONAL AND POLLED I/O.
8.4. INTERRUPT DRIVEN I/O.
8.5. INTERRUPT SERVICE ROUTINE.
8.6. INTERRUPT VECTOR.
8.7. DIRECT MEMORY ACCESS.
8.8. DEVICE REQUEST FLAG AND SERVICE REQUEST FLAG.
8.9. STROBED PORTS.
8.10. DESIGN OF SIMPLE INPUT AND /OR OUTPUT PORTS.
8.11. 8088/86 VECTORED INTERRUPT SYSTEM.
8.12. USE OF PRIORITY INTERRUPT CONTROL UNIT IN 8088/86 BASED SYSTEMS.
8.13. FUNDAMENTALS OF DMA-DRIVEN I/O IN 8088/86 BASED SYSTEM.
9. 8-BIT SUPPORT DEVICES
9.1. 8088/86 SUPPORT DEVICE.
9.2. GENERAL PURPOSE SUPPORT DEVICE.
9.3. PROGRAMMABLE SUPPORT DEVICE.
9.4. OPERATION AND PROGRAMMING OF INTEL 8255 PROGRAMMABLE PERIPHERAL INTERFACE.
9.5. OPERATION AND PROGRAMMING OF INTRL 8088/86 SUPPORT DEVICES.
9.6. FUNCTION OF INTEL 8-BIT SUPPORT DEVICES.
9.7. INTERFACE DESIGNING AND OPERATION DEMONSTRATION.
9.8. SDK-88/86 ENVIRONMENT.
BOOKS
1. THE 80x86 FAMILY, DESIGN, PROGRAMMING AND INTERFACING,
JOHN UFFENBACH.
2. MCS-88/86 USERS MANUAL, INTEL CORPORATION.
3. SKD-88/86 TRAINER, USER MANUAL.
4. MICROPROCESSOR ARCHITECTURE, PROGRAMMING AND APPLICATIONS WITH THE 8088/86/8080A, RAMESH,S.GAONKAR. MACMILLAN.
5. INTEL MICROPROCESSORS: HARDWARE, SOFTWARE AND APPLICATIONS, ROY W . GOODY, McGRAW HILL.
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